Monday, September 19, 2011

Intel To Lower Power Consumption Using Multi-Core Computing


On the last day of IDF (Intel Developer Conference), Intel Chief Technology Officer, Justin Rattner put forward Intel’s plan to move to many-core chips aiming at lowering the power consumption manifold.
Five years ago, Intel introduced its first multi-core processors. Rattner has expressed Intel’s wish to take multi-core computing to the next level. The Knights Corner Chip which is based on the many-core architecture is expected to launch with 50 cores on 22nm. The architecture of the memory model and instruction set is similar to Xeon processors with advanced floating point. Highlights featured the use of new parallel extensions for Javascript and use of futuristic technology for optimal use of power.
The advent of many-core computing is supposed to increase the energy efficiency as multi-core environment uses minimal power. Intel has made claims of lowering the power consumption by 300 times with multi-core computing in the next 10 years.
Andrzej Nowak of CERN Open Lab talked about using it at the Large Hadron Collider, which created 15-25 petabytes of data per year. CERN lab uses Intel chips having as many as 250,000 cores.
Intel’s many-core technology is supposed to become a norm for enhanced web access, PC security and will reduce the prerequisites for wireless infrastructure to provide better online performance.

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